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| S IGN DES NEW OR at ED F ARH or Center D /tsc MEN -1840 pport om OM S REC See H nical Su ntersil.c .i h NOT c r Te or www t ou Multiplexer September 1997ontac TERSIL c -IN -888 1 (R) HS-1840RH/883S Rad-Hard 16 Channel CMOS Analog with High-Z Analog Input Protection Pinouts HS1-1840RH/883S 28 PIN CERAMIC SIDEBRAZE DIP CASE OUTLINE D-10,COMPLIANT TO MIL-M-38510 PACKAGE TOP VIEW +VS 1 NC 2 NC 3 IN 16 4 IN 15 5 IN 14 6 IN 13 7 IN 12 8 IN 11 9 IN 10 10 IN 9 11 GND 12 (+5VS) VREF 13 ADDR A3 14 28 OUT 27 -VS 26 IN 8 25 IN 7 24 IN 6 23 IN 5 22 IN 4 21 IN 3 20 IN 2 19 IN 1 18 ENABLE 17 ADDR A0 16 ADDR A1 15 ADDR A2 Features * This Circuit is Processed in Accordance to Mil-Std-883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. * Radiation Environment - Gamma Rate () 1 x 108 RAD(Si)/s - Gamma Dose () 2 x 105 RAD(Si) * Low Power Consumption * Fast Access Time 1000ns * High Analog Input Impedance 500M During Power Loss (Open) * Dielectrically Isolated Device Islands * Excellent In Hi-Rel Redundant Systems * Break-Before-Make Switching * No Latch-Up Description The HS-1840RH/883S is a radiation hardened, monolithic 16 channel multiplexer constructed with the Intersil Linear Dielectric Isolation CMOS process. It is designed to provide a high input impedance to the analog source if device power fails (open) or the analog signal voltage inadvertently exceeds the supply rails during powered operation. Excellent for use in redundant applications, since the secondary device can be operated in a standby unpowered mode affording no additional power drain. More significantly, a very high impedance exists between the active and inactive devices preventing any interaction. One of sixteen channel selection is controlled by a 4-bit binary address plus an Enable-Inhibit input which conveniently controls the ON/OFF operation of several multiplexers in a system. All digital inputs have electrostatic discharge protection. The HS-1840RH/883S has been specifically designed to meet exposure to radiation environments. It is available in a 28 pin Ceramic Sidebraze dual-in-line package and 28 pin Ceramic Flatpack. It is guaranteed operational from -55oC to +125oC. HS9-1840RH/883S 28 PIN CERAMIC SIDEBRAZE FLATPACK CASE OUTLINE F-11A, COMPLIANT TO MIL-M-38510 PACKAGE TOP VIEW +VS NC NC IN 16 IN 15 IN 14 IN 13 IN 12 IN 11 IN 10 IN 9 GND (+5VS) VREF ADDR A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 OUT -VS IN 8 IN 7 IN 6 IN 5 IN 4 IN 3 IN 2 IN 1 ENABLE ADDR A0 ADDR A1 ADDR A2 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002. All Rights Reserved 1 File Number 3022.1 HS-1840RH/883S Functional Diagram IN 1 A0 1 P A1 DIGITAL ADDRESS A2 OUT A3 EN 16 P IN 16 ADDRESS INPUT BUFFER AND LEVEL SHIFTER DECODERS MULTIPLEX SWITCHES Truth Table A3 X L L L L L L L L H H H H H H H H A2 X L L L L H H H H L L L L H H H H A1 X L L H H L L H H L L H H L L H H A0 X L H L H L H L H L H L H L H L H EN H L L L L L L L L L L L L L L L L "ON" CHANNEL None 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 2 Specifications HS-1840RH/883S Absolute Maximum Ratings Supply Voltage Between Pins 1 and 27 . . . . . . . . . . . . . . . . . . +40V +VSUPPLY to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20V -VSUPPLY to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -20V VREF to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20V Analog input Overvoltage: +VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+25V (Power On/Off) -VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V (Power On) Digital Input Overvoltage: +VEN, +VA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VREF +4V -VEN, -VA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND -4V Storage Temperature Range . . . . . . . . . . . . . . . . . -65oC to +150oC Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . . .+275o Reliability Information Thermal Resistance . . . . . . . . . . . . . . . . . . JA JC Sidebraze Package . . . . . . . . . . . . . . . . . 83.1oC/W 19.1oC/W Flatpack Package . . . . . . . . . . . . . . . . . . 49.1oC/W 16.5oC/W Total Power Dissipation*: Sidebraze DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . 1600mW Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . 1400mW ESD Classification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 * For DIP Derate 20.4mW/oC above TA = +95oC For Flatpack Derate 18.5mW/oC above TA = +95oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Operating Conditions Operating Supply Voltage (VSUPPLY) . . . . . . . . . . . . . . . . . . . 15V Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC VREF (Pin 13) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V Logic Low Level (VAL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.8V Logic High Level (VAH). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.0V TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS Device Guaranteed and 100% Tested. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V GROUP A SUBGROUPS 7, 8A, 8B Measure Inputs Sequentially Ground All Unused Pins VAL = 0.8V, VAH = 4.0V VS = +10V, All Unused Inputs and Output = -10V, VEN = 4V VS = -10V, All Unused Inputs, Output = +10V, VEN = 4V V+, V-, VREF, A0, A1, A2, A3,A4, EN = GND, Unused Inputs Tied to GND, VS = +25V VS = +25V, VD = 0V, VEN = 4V All Unused Inputs Tied to GND VS = -25V, VD = 0V, VEN = 4V All Unused Inputs Tied to GND VD = +10V, VEN = 4V All Unused Inputs = -10V VD = -10V, VEN = 4V All Unused Inputs = +10V VS = +25V, Measure VD, VEN = 4V, All Unused Inputs to GND VS = -25V, Measure VD, All Unused Inputs to GND 1, 2, 3 LIMITS TEMPERATURE -55oC, +125oC +25oC, MIN -5 -1000 MAX +15 1000 UNITS V nA PARAMETER Analog Signal Range Input Leakage Current, Address, or Enable Pins Leakage Current Into the Source Terminal of an "Off" Switch SYMBOL VS IAH IAL +IS(OFF) CONDITIONS -55oC, +25oC, +125oC +25oC +125oC,-55oC +25oC +125 C, -55 C +25oC +125oC, -55oC o o 1 2, 3 1 2, 3 1 2, 3 -10 -100 -10 -100 -50 -100 10 100 10 100 50 100 nA nA nA nA nA nA -IS(OFF) Leakage Current into the Source Terminal of an "Off" Switch With Power "Off" Leakage Current Into the Source Terminal of an "Off" Switch With Overvoltage Applied Leakage Current Into the Drain Terminal of an "Off" Switch +IS(OFF) Power Off +IS(OFF) Overvoltage -IS(OFF) Overvoltage +ID(OFF) 1, 2, 3 1, 2, 3 1 2, 3 1 2, 3 1, 2, 3 -55oC, +25oC, +125oC -55oC, +25oC, +125oC +25oC +125o C, -55 C C o o -1000 -1000 -10 -100 -10 -100 -1000 1000 1000 10 100 10 100 1000 nA nA nA nA nA nA nA -ID(OFF) +25o o +125 C, -55 C -55o C, +25 C, +125oC o Leakage Current Into the Drain Terminal of an "Off" Switch With Overvoltage Applied +ID(OFF) Overvoltage -ID(OFF) Overvoltage 1, 2, 3 -55oC, +25oC, +125oC -1000 1000 nA 3 Specifications HS-1840RH/883S TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Guaranteed and 100% Tested. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V GROUP A SUBGROUPS 1 2, 3 1 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 LIMITS TEMPERATURE +25 C +125 oC, o PARAMETER Leakage Current from an "On" Driver into the Switch (Drain & Source) SYMBOL +ID(ON) CONDITIONS VS = +10V, VD = +10V, VEN = 0.8V All unused inputs = -10V VS = -10V, VD = -10V, VEN = 0.8V, All Unused Inputs = +10V VS = +15V, ID = -1mA, VEN = 0.8V VS = -5V, ID = +1mA, VEN = 0.8V VS = +5V, ID = -1mA, VEN = 0.8V VEN = 0.8V VEN = 0.8V VEN = 4.0V VEN = 4.0V MIN -10 -100 -10 MAX 10 100 10 100 1000 4000 2500 0.5 0.5 - UNITS nA nA nA nA mA mA mA mA -55oC -ID(ON) +25oC +125 C, -55 C -55 +125oC oC, o o -100 50 50 50 -0.5 -0.5 Switch On Resistance +15V R(ON) -5V R(ON) +5V R(ON) +25oC, -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC Positive Supply Current Negative Supply Current Positive Standby Supply Current Negative Standby Supply Current I(+) I(-) +ISBY -ISBY TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS Device Guaranteed and 100% Tested. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V GROUP A SUBGROUPS 9 10, 11 TON(A), TOFF(A) TON(EN), TOFF(EN) RL = 10K,CL = 50pF 9 10, 11 RL = 1000, CL = 50pF 9 10, 11 LIMITS TEMPERATURE +25oC +125oC, -55oC MIN 25 5 o PARAMETER Break-Before-Make Time Delay Propagation Delay Times: Address Inputs to I/O Channels Enable to I/O SYMBOL TD CONDITIONS RL = 1000, CL = 50pF MAX 600 1000 600 1000 UNITS ns ns ns ns ns ns +25 C +125oC, -55oC o +25oC +125 C, -55 C o - TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS Device Characterized At: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V, Unless Otherwise Specified LIMITS PARAMETER Capacitance Address Input Capacitance Channel Input Capacitance Channel Output Off Isolation SYMBOL CA CS(OFF) CD(OFF) TOFF(EN) VISO CONDITIONS +VS = -VS = 0V, f = 1MHz +VS = -VS = 0V, f = 1MHz +VS = -VS = 0V, f = 1MHz VEN = 4.0V, f = 200kHz, CL = 7pF, RL = 1k, VS = 3.0VRMS NOTE 1 1 1 1 TEMPERATURE +25 C +25oC +25oC +25oC o MIN 45 MAX 7 5 50 - UNITS pF pF pF dB NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters and not directly tested. These parameters are characterized upon initial design and after major process and/or design changes. 4 Specifications HS-1840RH/883S TABLE 4. POST 200K RAD(Si) ELECTRICAL CHARACTERISTICS Tested, per Mil-Std-883. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.5V, VAL = 0.5V GROUP A SUBGROUPS 1 1 1 1 LIMITS TEMPERATURE +25 C +25oC +25oC +25oC o PARAMETER Input Leakage Current, Address, or Enable Pins Leakage Current Into the Source Terminal of an "Off" Switch SYMBOL IAH IAL +IS(OFF) -IS(OFF) +IS(OFF) Power Off CONDITIONS Measure Inputs Sequentially, Ground All Unused Pins VS = +10V, All Unused Inputs & Output = -10V, VEN = 4.5V VS = -10V, All Unused Inputs & Output = +10V, VEN = 4.5V V+, V-, VREF, A0, A1, A2, A3, A4, EN = GND, Unused Inputs Tied to GND, VS = +25V VS = +25V, VD=0V, VEN=4.5V All Unused Inputs Tied to GND VS = -25V, VD=0V, VEN=4.5V All Unused Inputs Tied to GND VD = +10V, VEN = 4.5V All Unused Inputs = -10V VD = -10V, VEN = 4.5V All Unused Inputs = +10V VS = +25V, Measure VD, VEN = 4.5V All Unused Inputs to GND VS = -25V, Measure VD, VEN = 4.5V All Unused Inputs to GND VS = +10V, VD = +10V, VEN = 0.5V All Unused Inputs = -10V VS = -10V, VD = -10V, VEN = 0.5V All Unused Inputs = +10V VS = +15V, ID = -1mA, VEN = 0.5V VS = -5V, ID = +1mA, VEN = 0.5V VS = +5V, ID = -1mA, VEN = 0.5V VEN = 0.5V VEN = 0.5V VEN = 4.5V VEN = 4.5V RL = 1000, CL = 50pf RL = 10K, CL = 50pf MIN -1000 -100 -100 -100 MAX 1000 100 100 100 UNITS nA nA nA nA Leakage Current into the Source Terminal of an "Off" Switch With Power "Off" Leakage Current Into the Source Terminal of an "Off" Switch With Overvoltage Applied Leakage Current Into the Drain Terminal of an "Off" Switch +IS(OFF) Overvoltage -IS(OFF) Overvoltage +ID(OFF) -ID(OFF) +ID(OFF) Overvoltage -ID(OFF) Overvoltage +ID(ON) 1 1 1 1 1 +25oC +25oC +25oC +25oC +25oC -1500 -1500 -100 -100 -1000 1500 1500 100 100 1000 nA nA nA nA nA Leakage Current Into the Drain Terminal of an "Off" Switch With Overvoltage Applied 1 +25oC -1000 1000 nA Leakage Current from an "On" Driver into the Switch (Drain & Source) 1 +25oC -100 100 nA -ID(ON) 1 +25oC -100 100 nA Switch On Resistance +15V R(ON) -5V R(ON) +5V R(ON) 1 1 1 1 1 1 1 9 9 +25oC +25 C +25oC +25o C o 50 50 50 -0.50 -0.50 5 - 1000 4000 2500 0.50 0.50 3000 mA mA mA mA ns ns Positive Supply Current Negative Supply Current Positive Standby Supply Current Negative Standby Supply Current Make-Before-Break Time Delay Propagation Delay Times: Adress Inputs to I/O Channels Enable to I/O I(+) I(-) +I(SBY) -I(SBY) TD TON (A) TOFF (A) TON (EN) TOFF (EN) +25oC +25oC +25oC +25oC +25oC RL = 1000, CL = 50pf 9 +25oC - 3000 ns 5 Specifications HS-1840RH/883S TABLE 5. DC POST BURN-IN DELTA ELECTRICAL CHARACTERISTICS Guaranteed, per Mil-Std-883, Method 1019. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V GROUP A SUBGROUPS 1 LIMITS TEMPERATURE +25 C o PARAMETER Input Leakage Current, Address, or Enable Pins Leakage Current Into the Source Terminal of an "Off" Switch SYMBOL IAH IAL +IS(OFF) -IS(OFF) +ID(OFF) -ID(OFF) + ID(ON) CONDITIONS Measure Inputs Sequentially, Ground All Unused Pins VS = +10V, All Unused Inputs & Output = -10V, VEN = 4.0V VS = -10V, All Unused Inputs & Output = +10V, VEN = 4.0V VD = +10V, VEN = 4.0V All Unused Inputs = -10V VD = -10V, VEN = 4.0V All Unused Inputs = +10V VS = +10V, VD = +10V, VEN = 0.8V All Unused Inputs = -10V VS = -10V, VD = -10V, VEN = 0.8V All Unused Inputs = +10V VS = +15V, ID = -1mA, VEN = 0.8V VS = -5V, ID = +1mA, VEN = 0.8V VEN = 0.8V VEN = 0.8V VEN = 4.0V VEN = 4.0V MIN -100 MAX 100 UNITS nA 1 1 1 1 1 +25oC +25oC +25oC +25oC +25oC -20 -20 -20 -20 -20 20 20 20 20 20 nA nA nA nA nA Leakage Current Into the Drain Terminal of an "Off" Switch Leakage Current from an "On" Driver into the Switch (Drain & Source) -ID(ON) 1 +25oC -20 20 nA Switch On Resistance +15V R(ON) -5V R(ON) 1 1 1 1 1 1 +25oC +25oC +25oC +25oC +25oC +25oC -150 -250 -50 -50 -50 -50 150 250 50 50 50 50 A A A A Positive Supply Current Negative Supply Current Positive Standby Supply Current Negative Standby Supply Current I(+) I(-) +ISBY -ISBY TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUPS Initial Test Interim Test PDA Final Test Group A Group B B5 Others Group D Group E, Subgroup 2 METHOD 100%/5004 100%/5004 100%/5004 100%/5004 Samples/5005 Samples/5005 Samples/5005 Samples/5005 Samples/5005 Q SUBGROUPS 1 1 1 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3 1, 7 1, 7 1, 7 6 HS-1840RH/883S Performance Characteristics and Test Circuits ACCESS TIME vs. LOGIC LEVEL (HIGH) 4.0V 50% VA 0.8V VA 50 A3 A2 A1 A0 0.8V EN IN 1 IN 2 IN 15 IN 16 GND 10K 15V, 0V 0V, 15V VOUT 50pF VOUT 50% ta 0V BREAK-BEFORE-MAKE DELAY (tOPEN) 4.0V VA VOUT 50% 50% 0.8V VA 50 A3 A2 A1 A0 0.8V EN GND IN 1 IN 2 IN 15 IN 16 OUT 1K +5V VOUT 50pF tOPEN ENABLE DELAY (tON(EN), tOFF(EN)) VA 4.0V 0.8V A3 A2 A1 A0 IN 1 IN 2 IN 16 +10V 90% VOUT tON(EN) OUTPUT 10% VA 50 EN 1K VOUT 50pF tOFF(EN) 7 HS-1840RH/883S Burn-In/Life Test Circuits +VS R 1 2 3 4 5 6 7 8 9 10 GND F4 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 F3 F1 F2 F5 R R -VS +VS R 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 R -VS R GND VR R DYNAMIC BURN-IN AND LIFE TEST CIRCUIT NOTES: VS+ = +15.5V 0.5V, VS- = -15.5V 0.5V R = 1k 5% C1 = C2 = 0.01F 10%, 1 each per socket, minimum D1 = D2 = 1N4002, 1 each per board, minimum Input Signals: square wave, 50% duty cycle, 0V to 15V peak 10% F1 = 100kHz; F2 = F1/2; F3 = F1/4; F4 = F1/8; F5 = F1/16 NOTES: 1. The Above Test Circuits are Utilized for All Package Types 2. The Dynamic Test Circuit is Utilized for All Life Testing NOTES: STATIC BURN-IN TEST CIRCUIT R = 1k 5%, 1/4W C1 = C2 = 0.01F minimum, 1 each per socket, minimum VS+ = 15.5V 0.5V, VS- = -15.5V 0.5V, VR = 15.5 0.5V Irradiation Circuit 28 PIN DIP +15V NC NC +1V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 -15V 1K +5V NOTE: All irradiation testing is performed in the 28 pin DIP package 8 HS-1840RH/883S Schematic Diagrams ADDRESS INPUT BUFFER AND LEVEL SHIFTER V REF LEVEL SHIFTER V+ P P P P P P P P P LEVEL SHIFTED ADDRESS TO DECODE LEVEL SHIFTED ADDRESS TO DECODE OVERVOLTAGE PROTECTION V REF ADD IN. D2 R1 200 D1 P N R2 R5 R3 R4 N N N R6 N R8 N N N R7 N N V- ADDRESS DECODER +V P P P P P TO SWITCH MULTIPLEX SWITCH V+ N A0 OR A0 A1 OR A1 A2 OR A2 A3 OR A3 ENABLE N N N N P P P S IN FROM DECODE D N N OUT VV- 9 HS-1840RH/883S Intersil - Space Level Product Flow SEM - Traceable to Diffusion Method 2018 Wafer Lot Acceptance Method 5007 Internal Visual Inspection (Note 1) Gamma Radiation Assurance Tests Method 1019 100% Nondestructive Bond Pull Method 2023 Customer Pre-Cap Visual Inspection (Notes 1, 2) Temperature Cycling Method 1010 Condition C Constant Acceleration method 2001 Y1 30KG Particle Impact Noise Detection method 2020, Condition A 20G Marking and Serialization X-Ray Inspection Method 2012 Initial Electrical Tests (T0) Static Burn-In 72 Hour, +125oC method 1015 Condition A Room Temperature Electrical Tests (T1) Burn-In Delta Calculation (T0-T1) PDA Calculation 3% Functional 5% Subgroups 1, 7, Dynamic Burn-In 240 Hours, +125oC Method 1015 Condition D Electrical Tests Subgroups 1, 7, 9 (T2) Burn-In Delta Calculation (T0 - T2) PDA Calculation 3% Functional 5% Subgroups 1, 7, Electrical Test +125oC, -55oC Alternate Group A Inspection Method 5005 Fine and Gross Leak Tests Method 1014 Customer Source Inspection (Note 2) Group B Inspection (Notes 2, 4) Method 5005 Group D Inspection (Notes 2, 4) Method 5005 External Visual Inspection Method 2009 Data Package Generation (Note 3) NOTES: 1. Visual Inspection is performed to MIL-STD-883 Method 2010, Condition A. 2. These steps are optional, and should be listed on the purchase order if required. 3. Data package contains: Assembly Attributes (post seal) Test Attributes (includes Group A) -55oC, +25oC, +125oC Shippable Serial Number List Radiation Testing Certificate of Conformance Wafer Lot Acceptance Report (includes SEM report) X-Ray Report and Film Test Variables Data, DC Test and TELQV +25oC Initial Test +25oC Interim Test 1 +25oC Interim Test 2 +25oC Delta Over Burn-In 4. Group B data package contains Attributes Data pulse Variables Data, DC Test and TE2HQV. Group D data package contains Attributes only. 10 HS-1840RH/883S Metallization Topology DIE DIMENSIONS: 110 x 159 x 11mils METALLIZATION: Type: Al Thickness: 12.5kA 2kA GLASSIVATION: Type: SiO2 Thickness: 8kA 1kA DIE ATTACH: Material: Gold Eutectic Temperature: Sidebrazed Ceramic DIP - 460oC (Max) Flatpack - 460oC (Max) WORST CASE CURRENT DENSITY: 1.90e04A/cm2 LEAD TEMPERATURE (10 Seconds Soldering): <275oC PROCESS: CMOS-DI Metallization Mask Layout HS-1840RH/883S IN7 IN6 IN5 IN4 IN3 IN2 IN1 IN8 ENABLE -V A0 A1 OUT A2 A3 VREF +V IN16 GND IN15 IN14 IN13 IN12 IN11 11 IN10 IN9 |
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